4-Axis Level Shifter — Board Map

Holes are named by column and position from the top, not by a single running number. Left column = L1…L15 top to bottom. Right column = R16…R30, R16 at the bottom climbing to R30 at the top. Orientation is anchored to the silkscreen reading right way up.

Why not a plain 1–30: a single running number collides with GPIO numbers — “J1 pin 19” is not “GPIO 19” — and a clockwise/counter-clockwise rule is easy to reverse. L and R can be misread by nobody. ⭐ Mark L1 and R1 on the physical board with a paint pen and the ambiguity is gone for good.

Quick check on any hole: its count from the top plus its count from the bottom always equals sixteen. Fifth down the left column is also eleventh up — that is L5.

Every pad above is now measured, not inferred. Method: a bare unpopulated board from the same fab run, so the working assembly was never disturbed and no chips had to be levered out. With empty sockets every path is bare copper, so continuity means what it says. For each buffer channel: input pin → J1 gives the pad, output pin → screw terminal gives the signal. Sixteen measurements, each confirmed by lifting a probe and hearing the beep stop.

⚠ Two of the eight were wrong in the old map, and both would have bitten:

• Driver C was swapped. The map had STEP C on 27 and DIR C on 19. Measured, R19 is STEP and R27 is DIR. Wired from the old table, driver C would have had step and direction crossed — a motor that buzzes and will not turn.
• Driver D’s step pad was off by one. The map said 6; it is L5. Pad 8 was right.

Why the old numbers drifted: they came from live 5 V injection (2026-07-09) with the ESP32 disconnected, where un-driven ’125 inputs float HIGH and give false positives. That method got the right driver every time but could not see which channel, and it mis-called two pads. Cold continuity on a bare board has neither failure mode. ⭐ This is also the first time this AI-laid-out board has been verified against its own copper rather than against its schematic.

120 × 80 mm, 2 layer, standard 1.6 mm. Everything below on this page describes v1.0, which stays in service as a tester with its three hand fixes. v1.1 needs none of them.

What changed: five driver axes not four — yaw became a stepper after v1.0 was drawn, so it had been running at 3.3 V straight into a DM542T opto. Four SN74AHCT125N (IC1 = A/B, IC2 = C/D, IC3 = ENA A–D, IC4 = E/yaw), 15 of 16 channels used. Eleven 1k 0805 pull-downs, one per buffer input — the enable is a single GPIO21 net so it takes one resistor, not five. Four 0.1 µF 0805 decoupling caps. J11 deleted — driver returns land on the machine's own ground bus, and the six-position terminals carry PUL±/DIR±/ENA± so the returns sit beside their own signals. Eleven test points, one per signal. ESP32 footprint at a measured 25.4 mm row spacing so the module seats and the ten flying jumpers disappear.

⭐ Verified three independent ways before ordering: a parse of the drill coordinates (J1 row spacing 25.4 mm exact, pitch 2.54, span 35.56, drills 1.0 mm, all seven terminals 1.5 mm); a parse of the IPC-D-356 netlist (R1–R11 each on its own isolated net, C1–C4 across 5V/GND, no merged STEP/DIR nets); and OSH Park's own render, made by different software than produced the files.

⚠️ A lesson worth keeping. Across this revision the 3D render said nine resistors, then eleven, and one export contained none — while the design had them all along, on the bottom layer. Only the exported manufacturing data is authoritative, and it has to be parsed completely: an early check of mine read only the IPC 317 records and missed the 327 continuation records, where the passives live. Same failure as J11 below — a summary that said connected when the copper had to be asked directly.

⏳ On arrival: measure a terminal header pin with calipers before soldering — the holes are 1.5 mm and nothing has yet confirmed the pluggable Phoenix-style part against them.

The sixteen J11 holes are common with each other but were never tied to the board’s ground net. Measured J11 → J2 GND: 100 kΩ. A ground trace reads under an ohm; 100 kΩ is leakage through the chips, not copper.

⚠️ The earlier note that “all 16 holes = ground, confirmed by continuity” was half a test: it proved the holes were common with each other, never that they reached ground.

Why it would have been brutal to diagnose. The DM542T inputs are optocouplers: the board drives PUL+ from the buffer output and PUL−/DIR− return through J11. With J11 floating, the opto LED has no return path — no current, no signal, four dead axes — while the pin-walker passes perfectly and every terminal measures the correct voltage. The fault only appears once the loop closes through a driver.

✅ FIX (in place): a wire from the ESP32 GND terminal to any J11 hole. It carries the return current for all four drivers, so solder it at both ends — this board lives on the stationary Power Tower, so there is no reason to leave it on a friction fit.

⛔ On the next board revision: tie J11 to the ground net, and add 10 kΩ pull-downs on all eight ’125 inputs — the inputs float high when the ESP32 is unplugged or held in reset, and this board has neither.

Two separate things are wrong with treating J1 as a drop-in socket:

• Known and confirmed: the footprint is the wrong width, so a DevKit will not physically seat. That is why this board is wired with ten jumpers.
• New, 2026-09-17, and unexplained: the measured pads do not line up with a standard 30-pin DevKit pinout in either orientation. A standard board puts D25 eighth down the left column; we measured D25’s signal arriving at L11. Checked with the ESP32 both ways up — neither fits.

This does not affect anything: the measured map above is ground truth and the board works when wired to it. But it is worth resolving before laying out another board. The check: open the Flux project, read J1’s netlist, and compare it line by line against the eight rows above. Agreement means the board was fabricated as drawn and the old notes were simply wrong. Disagreement means a layout or fab error, and tells you how far to trust the tool next time.

⛔ Until that is settled, do not describe J1 as a socket you can plug an ESP32 into, and do not reuse this footprint on a new board.

• Ground is mandatory — the GND jumper gives the ESP32 and board a shared reference. Skip it and nothing moves.
• Power: the VIN→J2 wire runs the whole board off your ESP32's USB. (Or feed a separate 5 V into J2 — just tie all grounds together.)
• Finding each J1 hole: buzz continuity from a buffer-chip input pin to J1 (chips out = a direct trace) to see which hole carries which signal.
• Attach — verify, then commit: headers + jumpers first, run the pin-walker sketch to confirm each signal hits the right driver, fix any wrong wire — then solder the wires straight into the J1 pads (permanent, nothing to loosen). Ferrules on the ESP32 screw-terminal ends.